About the Organiser
Vellore Institute of Technology (VIT) was founded in 1984 as Vellore Engineering College by the Chancellor Dr G. Viswanathan. From its humble beginning, the institution has grown exponentially to that of having more than 33,000 students at present.
About the Conference
This International virtual conference on Emerging Trends and Challenges in Circuit to System Design (IETCCSD-2020) in the field of circuits and system design aims in bringing together, all the stakeholders that include academia, industry, R&D people who work in the field of hardware and software system design, verification, test, EDA tools development, and manufacturing of electronic circuits.
This two days conference creates an excellent platform for the delegates to interact virtually and to provide the solutions for the societal and engineering challenges of our times.
At least one author should register for each accepted paper and He/She need to present the paper through online mode. Only the presented papers will be considered for peer review and publication.
Call for Papers
Device Modeling, Analog and Mixed signal design, VLSI Architectures and System Integration, VLSI Testing and Security, System level Design, Hardware for AI and ML, Neuromorphic computing, Miscellaneous (Topics not fitting to the above tracks)
To submit papers, click here.
Selected papers based on the domain and quality will publish in Scopus Indexed journals with the processing fee prescribed by the concerned journal. Payment link and procedure will be sent to the corresponding authors.
How to Register?
Interested participants can register for the conference through this link.
- Last date of Submission: 31.07.2020
- Acceptance Notification: 2.08.2020
Convenor: Dr. R.Sakthivel, Associate Prof, SENSE and Dr. Sivanantham S, Associate Prof, SENSE
Email: firstname.lastname@example.org, email@example.com
For full details about the conference, click the link below.