Department of Electronics and Communication Engineering of National Institute of Technology (NIT) Delhi is inviting walk-in-interview from suitable candidates for the post of Project Associate/Lab Engineer/Guest Faculty (Project)in a time-bound research project for a temporary period purely on contractual basis.
Special Manpower Development Programme (SMDP) – Chip- to-System Design (C2SD)
Ministry of Electronics and IT, (MeitY) Govt. of India
1. Project Associate
Assist in the execution of VLSI projects. Assist faculty members in planning and conducting of VLSI /Embedded related UG lab classes. Documentation work.
B. Tech in Electronics and Communication Engineering (ECE) with minimum CGPA of 6.5 and having working experience in VLSI related software.
Working knowledge in UNIX/MATLAB/scripting, Cadence, Mentor Graphics, Synopsys TCAD, etc.
Rs.20,000/- PM Consolidated.
2. Lab Engineer
Hardware and VLSI Software installation and maintenance, Linux Network Administration, VLSI /Embedded related PG lab conduction and related research activities. Documentation work.
B.E./B. Tech. in Electronics or Electronics & Communication or Computer Science or Electrical Engineering, with a minimum CGPA of 6.5 or minimum 60 % marks, having a working knowledge on Windows, Linux and VLSI Software tools.
M.E. /M. Tech. in VLSI Design or Microelectronics or equivalent. Working knowledge of VLSI CAD tools like Cadance/ Mentor/ Magma/ Tanner/ Xilinx & Experience in Linux system administration.
Rs.34,000/- PM Consolidated.
3. Guest Faculty (Project)
Execution of VLSI projects, Teaching VLSI /Embedded related courses/lab and research activities. Documentation work.
Ph.D. in the field of VLSI Design or Microelectronics or equivalent
Ph.D. in field of VLSI & related Subjects, Publication in reputed journals, Working knowledge of VLSI tools like Cadance/ Mentor/ Synopsys/ Xilinx etc.
Rs. 40,000/-PM Consolidated.
The duration of the above posts will be for six months or date of completion of the project whichever is earlier. The candidates if selected for any of above post may be deputed anywhere in India for attending workshops/meeting related to the project.
How to Apply
Eligible Candidates may walk-in-interview on the scheduled date & venue. Candidates have to bring duly filled application form along with one copy of bio-data, all the original certificates, one set of self-attested photocopy of all certificates and two latest passport size color photographs on the scheduled date and time.
Important Date & Time
Date of Walk-in-Interview: September 25, 2019
Reporting: 9:30 A.M. to 11:30 A.M.
SMDP-C2SD Project Office Room No. 304, Department of Electronics & Communication Engineering, National Institute of Technology Delhi Sector A-7, IAMR Campus, Institutional Area, Narela 110040, Delhi, India. Interview will commence from 12 Noon onwards.
Phone No. +91 1133861152 (Office).