Applications are invited from fresh graduates for the post of R&D Engineer at Synopsys, Bangalore.
Synopsys is an American electronic design automation company that focuses on silicon design and verification, silicon intellectual property and software security and quality.
You would be responsible for designing, developing, troubleshooting, debugging and maintaining large and efficient software systems for partitioning, logic, timing optimization, technology mapping steps of the FPGA prototyping software.
You would be expected to:
- Given a requirement or functional specification, design and implement efficient data structures and algorithms in C/C++.
- Work with AE team in test planning, execution and customer support.
- Maintain and support existing product and features.
You will have:
- B.Tech/M. Tech in CS/EE from a reputed institute.
- Sound knowledge in data structures, graph algorithms and C/C++ programming on Windows/Unix.
- Familiarity in digital logic design.
- Familiarity with Verilog/VHDL RTL level designs, timing constraints, static timing analysis
- 0-2 years of experience in designing, developing and maintaining large EDA software.
- Working knowledge of FPGA prototyping tools and flows is a plus.
How to Apply?
Interested applicants can apply for the post through this link.
For more details, click the link below.