Applications are invited for the Internship Opportunity (Technical-Engineering) at Synopsys, Noida.
Synopsys is an American electronic design automation company that focuses on silicon design and verification, silicon intellectual property and software security and quality.
You will be responsible for a wide variety of verification tasks, including designing self-checking test benches using modern verification techniques; designing verification components such as bus functional models, monitors, and behavioral models; implementing functional coverage and assertions using System Verilog; and developing test and functional coverage plans based on device specifications. This position will also be responsible for analyzing and debugging simulation failures, as well as analyzing functional coverage results.
- Strong Verilog coding skills
- Strong debugging skills
- Strong C/C++ or Perl or python scripting skills
- Knowledge on FPGA Architectures
- Highly skilled with one or more industry standard simulation tools Synopsys VCS, Verdi
- Strong understanding of typical design structures (FIFO’s, pipelines, memories, state machines, etc.)
- Fast leaner, comfortable and confident interacting with architects
- Excellent written and verbal communication skills
B.Tech/M.Tech in EE from a reputed institute
How to Apply?
Interested applicants can apply for the internship through this link.
For more details, click the link below.