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Internship Opportunity: Technical-Engineering at Synopsys, Hyderabad: Application Open

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About

Synopsys is an American EDA company. Majority of their products include tools used in the design of an application-specific integrated circuit. Products include logic synthesis, behavioural synthesis, place and route, static timing analysis, formal verification, hardware description language (SystemC, SystemVerilog/Verilog, VHDL) simulators as well as transistor-level circuit simulation.

Synopsys is hiring Intern (Technical-Engineering) for its Hyderabad location. The candidate will be a key member of the Synopsys Design Ware ARC Processor hardware team.

Essential Qualification
  • Bachelor’s degree in engineering is required as a minimum.
  • Requires 0+ years of related experience.
  • Good Digital Design Knowledge is a must.
  • Microprocessor architecture knowledge is a big plus.
  • Good written, verbal and analytical skills desired.
  • Experience in areas of HDL and Verification languages: System Verilog, Verilog
Programming Skills

C, C++, Assembly, Perl, Makefile Generation

Tools

RTL Simulators, eg VCS. own template

Job Responsibilities

Responsibility includes development of Verification Test benches and automation, creation of tests – both directed and random, functional coverage model creation and report analysis, code coverage analysis, development of C-models, resolving mismatches between design and C-model, integration of third-party and internal verification IP, regression management, review and improvement of verification test suites.

How to Apply?

Interested candidates can apply through this link.

For further details, click here.

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